Heterogeneous computing and parallel code acceleration has been advancing for general purpose processors (GPPs), graphical processing units (GPUs), digital signal processors (DSPs), and field programmable gate array (FPGA) devices. These advances in heterogeneous computing and parallel code acceleration have led to development in parallel software languages such as OpenCL and CUDA. Some of the parallel software languages (e.g., OpenCL) are portable across one or more acceleration platforms while other (e.g., CUDA) are proprietary a type of GPUs. In addition, high level synthesis (HLS) for FPGA devices has advanced to enable creation of accelerated computing systems from C/C++ code. However, heterogeneous computing and parallel code acceleration is limited by hardware implementation in which such computing is performed.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced.